; IR MEMORIZER ;working version: ;Power up with button pressed ;recording starts when button released ;press again to stop recording ;measures period, saves in FLASH-, ;captueres 4 cycles to measure period. ;if no signals for 131 ms, next period is sampled and saved. ;THIS VERSION TIMES OUTPUT PULSES IN CYCLES, NOT TIME. ;TIME OFF = stored as TIMER 0 ticks, 8 Usec ;TIME ON = Stored as number of IR pulses at stored pariod rate ;memory data format: ;first location is DATA LOW ;second location is DATA HI ;bit 7 of DATA HI is STOP bit ;bit 6 of DATA HI is POLARITY bit, ACTIVE LOW ;valid STOP condition = DATA HI 6 AND 7 HIGH ;valid PERIOD SAMPLE = DATA HI 6 = LOW, 7 = HIGH ;bits 0-13 are time values: ;normal delay = 8 us / count ;period sample = 62.5 ns / count (expressed as half the carrier period) ;************************************************************************************ ; ; Leo Max Fernekes, SENSACELL CORPORATION ; Copyright 2005-2006-2007-2008-2009-2010-2011-2012-2013 All Rights Reserved ; ;*********************RUN WITH 16 MHZ Clock and X4 PLL enabled*********************** CODE_PROTECT equ 0 ;set to 0 for using ICD2 debugger- disables code protect features list P=PIC18F46K22 include "p18f46k22.inc" ;******************************************************************************************** ; CONFIG OSC = HSPLL ;HS oscillator, PLL enabled (Clock Frequency = 4 x FOSC1) ; CONFIG FCMEN = OFF ;Fail-Safe Clock Monitor disabled ; CONFIG IESO = OFF ;Oscillator Switchover mode disabled ; CONFIG PWRT = ON ;PWRT enabled ; CONFIG BORV = 3 ;Minimum setting ; CONFIG WDT = OFF ;WDT disabled (control is placed on the SWDTEN bit) ; CONFIG WDTPS = 32768 ;1:32768 ; CONFIG PBADEN = OFF ;PORTB<4:0> pins are configured as digital I/O on Reset CONFIG CCP2MX = PORTB3 ;CCP2 input/output is multiplexed with RB3 CONFIG STVREN = ON ;Stack full/underflow will cause Reset CONFIG LVP = OFF ;Single-Supply ICSP disabled CONFIG XINST = OFF ;Instruction set extension and Indexed Addressing mode disabled (Legacy mode) CONFIG PLLCFG = ON ;Oscillator multiplied by 4 CONFIG FOSC = INTIO67 ;Internal oscillator block CONFIG PRICLKEN = ON ;Primary clock enabled CONFIG FCMEN = OFF ;Fail-Safe Clock Monitor disabled CONFIG IESO = OFF ;Oscillator Switchover mode disabled CONFIG PWRTEN = ON ;Power up timer enabled CONFIG PBADEN = OFF ;PORTB<5:0> pins are configured as digital I/O on Reset CONFIG WDTEN = OFF ;Watch dog timer is always disabled. SWDTEN has no effect. CONFIG BORV = 285 ;VBOR set to 2.85 V nominal CONFIG T3CMX = PORTB5 ;T3CKI is on RB5 if CODE_PROTECT ;turn off when using debugger! CONFIG BOREN = SBORDIS ;Brown-out Reset enabled in hardware only (SBOREN is disabled) CONFIG DEBUG = OFF ;Background debugger disabled, RB6 and RB7 configured as general purpose I/O pins ; CONFIG MCLRE = OFF ;RE3 input pin enabled; MCLR disabled CONFIG MCLRE = INTMCLR ;RE3 input pin enabled; MCLR disabled CONFIG CP0 = ON ;Block 0 (000800-001FFFh) code-protected CONFIG CP1 = ON ;Block 1 (002000-003FFFh) code-protected CONFIG CPB = ON ;Boot block (000000-0007FFh) code-protected CONFIG WRT0 = ON ;Block 0 (000800-001FFFh) write-protected CONFIG WRT1 = ON ;Block 1 (002000-003FFFh) write-protected CONFIG WRTB = ON ;Boot block (000000-0007FFh) write-protected CONFIG WRTC = ON ;Configuration registers (300000-3000FFh) write-protected else CONFIG BOREN = OFF ;Brown-out Reset disabled in hardware and software CONFIG DEBUG = ON ;Background debugger enabled, RB6 and RB7 are dedicated to In-Circuit Debug ; CONFIG MCLRE = ON ;MCLR pin enabled; RE3 input pin disabled CONFIG MCLRE = EXTMCLR ;MCLR pin enabled, RE3 input pin disabled CONFIG CP0 = OFF ;Block 0 (000800-001FFFh) not code-protected CONFIG CP1 = OFF ;Block 1 (002000-003FFFh) not code-protected CONFIG CPB = OFF ;Boot block (000000-0007FFh) not code-protected CONFIG WRT0 = OFF ;Block 0 (000800-001FFFh) not write-protected CONFIG WRT1 = OFF ;Block 1 (002000-003FFFh) not write-protected CONFIG WRTB = OFF ;Boot block (000000-0007FFh) not write-protected CONFIG WRTC = OFF ;Configuration registers (300000-3000FFh) not write-protected CONFIG EBTR0 = OFF ;Block 0 (000800-001FFFh) not protected from table reads executed in other blocks CONFIG EBTR1 = OFF ;Block 1 (002000-003FFFh) not protected from table reads executed in other blocks CONFIG EBTRB = OFF ;Boot block (000000-0007FFh) not protected from table reads executed in other blocks endif ;*********************************PAGE 1-2-3 RAM************************************** cblock 0x100 sample_buffer: 0x80 ;64 samples endc cblock 0x00 ;starting RAM, BANK 0 ir_status ;bit 0 = (1) first edge ;bit 1 = (1) logic polarity ;bit 2 = (1) playback mode ;bit 3 = (1) output status ;bit 4 = (1) valid_period ;bit 5 = (1) ;bit 6 = (1) ;bit 7 = (1) time_sample_0 time_sample_1 write_bytes spi_buf_2 ;holds 2nd byte in SPI data triplet flash_memory_status ;bit 0 = 1 ACTIVE ;bit 1 = 1 ERASE ;bit 2 = 1 READ ;bit 3 = 1 WRITE ;bit 4 = 1 START ;bit 5 = 1 END WRITE ;bit 6 = 1 ;bit 7 = 1 period_counter period_low period_hi one_5_period_low one_5_period_hi temp_L temp_H comp_L comp_H cycle_count_L cycle_count_H endc ;end of bank 0 RAM VARIABLES ;*********************************************************************************** period_comp equ .1 ;increments of 62.5 ns ;**************START OF EXECUTABLE CODE************************* org 0 nop ;for ICD debugger... goto start org 0x8 ;interupt vector, HIGH PRIORITY goto interrupt_routine ;******************INTERRUPT SERVICE ROUTINE********************* ; * ; * ; ISR ISR ISR ISR ISR ISR ISR ISR ISR ISR ISR ISR ISR ISR * ; * ; * ;**************************************************************** interrupt_routine ; movff PCLATH,pclat_temp ;save PCLAT movlb 0 ;set to bank 0 ;**************************************************************** ;determine source of interrupt: btg LATA,1 ;diagnostic!!!!!! btfsc ir_status,2 ;test for PLAYBACK MODE goto play_routine ;write mode: btfss PIE1,CCP1IE ;test CCP1 interrupts ON bra no_ccp_int btfsc PIR1,CCP1IF ;test CCP interrupt bra timeout_after_edge no_ccp_int btfsc INTCON3,INT1IF ;test for INT ON FALL RB1 goto input_change ;TIMER 0 INTERRUPT - timer 0 has timed out- no transitions for 131 ms ; btg LATA,2 ;diagnostic!!!!!! movlw b'11000000' movwf TMR0H clrf TMR0L bcf INTCON,TMR0IF ;clear TIMER 0 interrupt FLAG movlw b'11111111' movwf time_sample_0 movlw b'00111111' movwf time_sample_1 btfss ir_status,1 ;test polarity bit bra still_active bsf time_sample_1,6 ;set polarity bit to match pulse polarity bcf ir_status,4 ;clear valid period bit- re-sample still_active btfsc PORTB,0 ;test pushbutton input goto no_stop_3 bsf time_sample_1,7 ;set STOP when Button is released bsf time_sample_1,6 ;BOTH bits must be high for valid STOP no_stop_3 call push_sample ;save the value goto isr_pop input_change ;falling edge detected, RB1 ; btg LATA,3 ;diagnostic!!!!!! bcf INTCON3,INT1IF ;clear the interrupt btfss ir_status,0 ;test first edge bit bra first_edge btfss ir_status,4 ;test valid period bit bra period_measure ;still measuring clrf TMR1H clrf TMR1L ;reset timer 1 incfsz cycle_count_L,F ;increment the pulse counter bra isr_pop ;exit- waiting for CCP match interrupt incf cycle_count_H,F bra isr_pop ;exit- waiting for CCP match interrupt period_measure decfsz period_counter,F ;dec the period counter bra isr_pop ;not done yet bcf T1CON,TMR1ON ;stop timer 1 ;calculate period (4 periods have been captured) movff TMR1L,period_low movff TMR1H,period_hi ;save the period bcf STATUS,C ;clear carry rrcf period_hi,F rrcf period_low,F ;divide by 2 movff period_hi,comp_H movff period_low,comp_L ;copy to compensation register bcf STATUS,C ;clear carry rrcf period_hi,F rrcf period_low,F ;divide by 4 ;period now holds a single period movff period_hi,CCPR1H movff period_low,CCPR1L ;transfer to CCPR1 bcf STATUS,C ;clear carry rrcf period_hi,F rrcf period_low,F ;divide by 8 ;period register now holds half-period movf period_low,W addwf CCPR1L,F movf period_hi,W addwfc CCPR1H,F ;CCPR1 now holds 1.5 periods clrf TMR1H clrf TMR1L ;reset timer 1 bsf T1CON,TMR1ON ;start timer 1 bsf ir_status,4 ;set valid period bit bcf ir_status,1 ;clear polarity bit- ACTIVE state movff period_low,time_sample_0 movff period_hi,time_sample_1 ;set pattern for PERIOD SAMPLE - save in buffer bsf time_sample_1,7 ;set STOP bit bcf time_sample_1,6 ;clear POLARITY bit call push_sample ;save the value goto isr_pop ;********************************************** timeout_after_edge ;THIS IS CCP interrupt! ;********************************************** movff cycle_count_L,time_sample_0 movff cycle_count_H,time_sample_1 ;save the count ;*********************** ;compensate for sampling error - add one period movlw b'11000000' ;reload timer movwf TMR0H movff comp_H,TMR0L ;********************** bcf PIE1,CCP1IE ;disable CCP1 interrupt bcf ir_status,0 ;clear first edge bit bcf time_sample_1,6 ;set data polarity ACTIVE bcf time_sample_1,7 ;clear the STOP BIT btfsc PORTB,0 ;test pushbutton input bra no_button bsf time_sample_1,7 ;set STOP when Button is released bsf time_sample_1,6 ;BOTH bits must be high for valid STOP no_button btfsc ir_status,4 ;test valid period bit -SKIP SAVE IF NO VALID PERIOD call push_sample ;save the value bsf ir_status,1 ;set polarity bit, IDLE STATE bcf LATC,6 ;turn OFF GREEN STATUS LIGHT bcf INTCON,TMR0IF ;clear TIMER 0 interrupt FLAG bsf INTCON,TMR0IE ;enable TIMER 0 interrupts - goto isr_pop ;******************************************************* first_edge ; btg LATA,5 ;DIAGNOSTIC clrf TMR1H ;reset period timer 1 clrf TMR1L movff TMR0L,time_sample_0 ;save timer 0 movff TMR0H,time_sample_1 bcf INTCON,TMR0IE ;disable TIMER 0 interrupts - only counting cycles bsf ir_status,0 ;set first edge bit bsf time_sample_1,6 ;set polarity bit to IDLE bcf time_sample_1,7 ;clear the STOP BIT btfsc PORTB,0 ;test pushbutton input bra no_button_2 bsf time_sample_1,7 ;set STOP when Button is released bsf time_sample_1,6 ;BOTH bits must be high for valid STOP no_button_2 call push_sample ;save the value bcf ir_status,1 ;clear polarity bit to ACTIVE state bsf LATC,6 ;turn ON GREEN STATUS LIGHT btfsc ir_status,4 ;test valid period bit bra ok_period ;not measuring this time movlw .4 movwf period_counter ;setup period counter ;reset timer(s) movlw 0x80 movwf CCPR1L ;If 200 us elapses and no period - GLITCH, ignore movlw 0x0C ;set to int in 200 Us. movwf CCPR1H ;set to avoid CCP reset bcf PIR1,CCP1IF ;clear any pending interrupt bsf PIE1,CCP1IE ;enable CCP1 interrupt movlw .4 movwf cycle_count_L clrf cycle_count_H ;reset cycle counter, = 4 goto isr_pop ok_period ;reset timer(s) bcf PIR1,CCP1IF ;clear any pending interrupt bsf PIE1,CCP1IE ;enable CCP1 interrupt movlw .0 movwf cycle_count_L clrf cycle_count_H ;reset cycle counter, = 1 goto isr_pop ;***************************************************************************** play_routine btfss PIE1,CCP1IE ;test for carrier ints ON bra no_carrier_int btfsc PIR1,CCP1IF bra carier_gen ;service the carrier generator no_carrier_int ;must be TIMER 0 int bcf INTCON,TMR0IF ;clear TIMER 0 interrupt FLAG btfsc ir_status,1 ;test polarity bit (active low) bra not_active movff time_sample_1,cycle_count_H ;load counter movff time_sample_0,cycle_count_L ;active state bcf INTCON,TMR0IE ;disable TIMER 0 interrupts - only counting cycles ; btfsc ir_status,3 ;test OUTPUT STATUS bit ; bra manage_sample ;already active, continue bsf LATA,7 ;engage output clrf TMR1H clrf TMR1L ;reset timer 1 bcf PIR1,CCP1IF ;clear any pending interrupt bsf PIE1,CCP1IE ;enable CCP1 interrupt ; bsf ir_status,3 ;set OUTPUT STATUS bit bsf LATC,7 ;turn ON RED STATUS LIGHT manage_sample call pull_sample goto isr_pop not_active movff time_sample_1,TMR0H ;load timer movff time_sample_0,TMR0L call pull_sample goto isr_pop carier_gen bcf PIR1,CCP1IF ;clear interrupt flag btg LATA,7 ;toggle output state btfsc LATA,7 ;check state of output bra isr_pop ;output on, continue ;inc the cycle counter incfsz cycle_count_L,F bra isr_pop ;not done, continue incfsz cycle_count_H,F bra isr_pop ;not done, continue ;counter = 0! rollover! movff time_sample_1,TMR0H ;load timer movff time_sample_0,TMR0L bcf INTCON,TMR0IF ;clear TIMER 0 interrupt FLAG bsf INTCON,TMR0IE ;enable TIMER 0 interrupts ! bcf PIE1,CCP1IE ;turn off CCP1 interrupt bcf LATC,7 ;turn OFF RED STATUS LIGHT call pull_sample ;----done---- ;*******************ISR ENDS HERE****************************** isr_pop ; movff pclat_temp,PCLATH ;restore PCLAT retfie 1 ;return FAST MODE ;************************************************************** ; ; ; ; ; ; $$$$$$$$ ; $$$$$$$$ ; $$$$$$$$ ; ; ; ; ; ;******************IN LINE CODE STARTS HERE***************************** start: ;*********************************************************************** ;******************************** ;set oscillator for 16 Mhz, enable 4 X PLL banksel OSCCON movlw b'01110000' movwf OSCCON bsf OSCTUNE,PLLEN movlb 0 ;clear entire RAM PAGE 0,1,2 clrf FSR0L clrf FSR0H ;set FSR0 to beginning of RAM BANK 0 movlw 0x03 clear_loop clrf POSTINC0 ;clear indirect cpfseq FSR0H ;test for done with BANK 2 bra clear_loop ;A ONE (1) IN THE TRIS REGISTER MAKES IT AN INPUT!!! ;********************PORT A SETUP**************************************** clrf LATA ;clear port pins movlw B'00000000' movwf TRISA ; ; movlb 0x0F ;bank switch clrf ANSELA ;enable digital inputs movlb 0 ;set back to bank 0 ;********************PORT B SETUP**************************************** ;A ONE (1) IN THE TRIS REGISTER MAKES IT AN INPUT!!! clrf LATB ;clear port pins movlw B'01011011' ;0 bits are outs movwf TRISB ;PortB bits B0= x B1= SER_2 B2= STROBE B3= CCP2 INPUT ;B4= SER_1 B5= SCLK movlb 0x0F ;bank switch clrf ANSELB ;enable digital inputs movlb 0 ;set back to bank 0 ;********************PORT C SETUP**************************************** ;A ONE (1) IN THE TRIS REGISTER MAKES IT AN INPUT!!! clrf LATC ;clear port pins movlw B'00010011' ;RC6= GREEN STATUS LED, RC7=RED STATUS LED movwf TRISC ; ; movlb 0x0F ;bank switch clrf ANSELC ;enable digital inputs movlb 0 ;set back to bank 0 ;********************PORT D SETUP**************************************** ;A ONE (1) IN THE TRIS REGISTER MAKES IT AN INPUT!!! clrf LATD ;clear port pins bsf LATD,7 ;set FLASH MEMORY /CE HIGH, Disable movlw B'01001010' movwf TRISD ;PORTD B0=SCLK, B1=SIN, B2= ;B3=, B4=SOUT B5=TX-ENABLE B6=, B7=/CS movlb 0x0F ;bank switch clrf ANSELD ;enable digital inputs movlb 0 ;set back to bank 0 ;********************PORT E SETUP**************************************** ;A ONE (1) IN THE TRIS REGISTER MAKES IT AN INPUT!!! clrf LATE ;clear port pins movlw B'11111100' ;PORTE, 0,1 are CHARGE PUMP outputs movwf TRISE ; movlb 0x0F ;bank switch clrf ANSELE ;enable digital inputs movlb 0 ;set back to bank 0 ;************************************************************************ ;***********enable timer0 with prescale********** ; CLRWDT ; Clear WDT and prescaler ; BANKSEL OPTION_REG ; MOVLW b'11010110' ; Select TMR0, new prescale/64 ; MOVWF OPTION_REG ; value and clock source ;***************************************************** ;setup timer 0 for main time base movlw b'10000110' ;setup timer 0 to run @ 125 khz from internal clock, in 16 bit mode.(64 mhz) movwf T0CON ;setup compare #1 movlw b'00001011' movwf CCP1CON ;special event trigger- reset counter and set CCP1IF movlw 0xff movwf CCPR1L movwf CCPR1H ;set CCP full scale ;setup timer 1 as timer for carrier generator / measurement- counts 16 mhz movlw b'00000011' ;bit 0 enables timer, 1= 16 bit mode, 2= NO SYNC EXT CLOCK, 3= OSC OFF 4-5= Prescale=0, 6,7= = fosc/4 CLOCK movwf T1CON ;***************************************************************************** ;setup clock sources for CCPX modules movlw b'00001000' ;CCP1- Timer 1, CCP2- Timer 3. movwf CCPTMRS0 movlb 0 ;set back to bank 0 ;****************Sychronous Serial Port 2 Setup********************* ;for FLASH MEMORY interface movlb 0x0F ;bank switch ; movlw b'00100010' ;bits 3:0 = SPI fosc/64, B4= CKP:0, B5= SPEN:1, movlw b'00100001' ;bits 3:0 = SPI fosc/16, B4= CKP:0, B5= SPEN:1, movwf SSP2CON1 movlw b'11000000' ;B6 CKE:1, B7=SMP:1 movwf SSP2STAT movlb 0 ;set back to bank 0 bsf PIR2,EEIF ;set EEPROM WRITE DONE FLAG- prime system ;************************************************************************ lfsr 1,sample_buffer lfsr 2,sample_buffer ;************************************************************************ ;enable timer 0 interrupts bsf INTCON,TMR0IE ;enable TIMER 0 interrupts ON bsf INTCON,PEIE ;enable peripheral ints ;******************************************************************************** ;enable flash memory movlw b'01000001' ;write to status register movwf flash_memory_status call flash_memory_routine ;execute write to status ;******************************************************************************** ;test for write mode on startup bsf ir_status,1 ;set the POLARITY BIT to 1 = NOT ACTIVE btfsc PORTB,0 ;test pushbutton input goto play_back ;no button, continue ;write mode- ;begin, loop for button release release_loop btfss PORTB,0 ;test pushbutton input bra release_loop ;loop for HIGH state bsf LATC,7 ;turn on RED STATUS LIGHT call erase_flash ;clear the memory movlw b'00011001' ;enable WRITE MODE movwf flash_memory_status bcf INTCON3,INT1IF ;clear the interrupt bsf INTCON3,INT1IE ;enable INT 1 on RB1 bcf INTCON2,INTEDG1 ;INTERRUPT ON FALLING EDGE bsf INTCON,GIEH ;turn ON INTERRUPTS goto main play_back bsf ir_status,2 ;set playback mode bsf LATC,6 ;turn on GREEN STATUS LIGHT movlw b'00010101' movwf flash_memory_status ;enable READ ;preload for 1st delay movlw 0xFF movwf time_sample_0 movlw 0x7F movwf time_sample_1 bsf INTCON,GIEH ;turn ON INTERRUPTS ;******************************************************************************** main ; MAIN MAIN MAIN MAIN MAIN MAIN ;******************************************************************** btfss ir_status,2 ;test playback mode goto learn_mode ;we are in PLAYBACK MODE ; btg LATA,7 ;diagnostic!!!!!!!!!!!!!!!!!!!!!!!!!!!!! bsf flash_memory_status,0 ;hold reads btfsc write_bytes,6 bcf flash_memory_status,0 ;stop reads if buffer is above 0x80 call flash_memory_routine goto main learn_mode call flash_memory_routine goto main ;********************************************************************* push_sample ;revolving 128 sample FIFO btg LATA,0 ;diagnostic!!!!!! incf write_bytes,F movff time_sample_0,POSTINC1 movff time_sample_1,POSTINC1 btfss FSR1H,1 return lfsr 1,sample_buffer ;done 128 samples, reset return ;********************************************************************* pull_sample decf write_bytes,F movlw 0xFF movwf time_sample_0 movwf time_sample_1 movf POSTINC1,W ;get low movwf temp_L ;save a copy subwf time_sample_0,F ;subtract from 0xFF movf POSTINC1,W ;get high movwf temp_H ;save a copy bcf ir_status,1 ;clear polarity bit btfsc WREG,6 ;test polarity of data bsf ir_status,1 ;set polarity bit ;test for stop bit goes here btfss WREG,7 ;test for STOP bit- DONE bra no_stop btfsc WREG,6 ;bit 6 must be HIGH for STOP bra end_of_record ;stop detected- DONE ;BIT 7 = HI, BIT 6=LOW- it's a period sample movlw period_comp ;subtract compensation valuve subwf temp_L,W movwf CCPR1L ;save result in CCPR1 clrf WREG subwfb temp_H,W movwf CCPR1H ;load period register bcf CCPR1H,7 ;force bit 7 to LOW bra pull_sample ;do it again, get new delay value no_stop andlw b'00111111' ;force upper 1 bits low subwfb time_sample_1,F ;check for end-of-buffer btfss FSR1H,1 return lfsr 1,sample_buffer ;done 128 samples, reset return end_of_record bcf LATC,6 ;turn OFF GREEN STATUS LIGHT bcf INTCON,GIEH ;turn OFF INTERRUPTS - were done nop goto end_of_record ;********************************************************************* #include "external_flash_memory_3.asm" end